AMD is Hiring for Intern-Co Ops Role

JOB ROLE : Co-Op/ Intern

Location -HYDERABAD

ABOUT

    • his position is in the AMD Xilinx Hyderabad FPGA architecture team
    • FPGAs provide a fertile area w.r.t exploring new or porting existing ASIC techniques for power, performance and area optimizations across the full spectrum (i.e. system to circuits) and there’s a great potential to be exposed to some of these in this role
    • The work involves :
      • Exploration of new circuit, architectural and algorithmic techniques for improving FPGA Fabric performance, power and area.
      • Close collaboration with a senior mentor who will be driving this activity
      • Broad exploration across various areas: circuits, automation, tool/wrapper development, algorithms and architecture
      • Exposure to the state of the art and leading edge developments in the FPGA world
    • A successful candidate may potentially be absorbed in AMD and further drive these explorations to fruition or explore some of these problems to drive their research in the academia
    • The candidate will be responsible for closely collaborating with the mentor and the team, explore research papers (external or internal), run simulations (circuit/hdl), build models and help in exploring the value of various approaches being identified
    • A high performing candidate will have learnt skills like Transistor/Cell level digital circuit design, SPICE based simulations, Verilog simulations, Simple to complex mathematical modeling, Algorithmic techniques driving FPGA optimizations, basics of FPGA architecture and its key functional blocks.
  • This is for a period of 6 months, beginning (Jan, 2023).
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Education Required:

    • BS/BE/BTech (final year, graduated), MTech/MS (final year, graduate)
      • Electrical, CS, Electronics, Instrumentation, or equivalent streams
  • 2019,2020,2021 & 2022

skills

  1. Communication skills.

    • Strong Logic design fundamentals
      • RTL coding skills (preferred)
    • Strong basic circuit design concepts (Network Analysis primarily)
    • Strong transistor level digital design fundamentals
      • Experience with SPICE sims (preferred)
      • Experience with schematic editor like Cadence Virtuoso or eqv. (preferred)
    • Programing/Algorithmic skills and projects in C++/Python (preferred)
    • Machine Learning skills and projects (preferred)

SALARY:4 lpa expected

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