Role :
Intern - VLSI DI
Location :
Pune, IN
JOB DESCRIPTION:
- Any skills related to the role
- the selected Should have excellent English communication with a decent accent
- the selected persons must have basic knowledge about
- ASIC design flow, basic EDA tools for Physical design implementation
- Place and Route, Timing Analysis, Equivalence check
- Perl, Tcl, Shell or other scripting languages
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What you will do
- Any skills related to the role
- the selected Should have excellent English communication with a decent accent
- You should be able to work on block level Physical Design implementation using EDA tools for floorplanning, placement and timing analysis
- You are supposed to Understand Semicustom IC design flow using IP libraries, concepts of Verilog netlist, meaning of timing constraints and QOR checks
- You need to Work on Physical design tasks including floor-planning, placement, clock tree synthesis, routing, timing analysis and equivalence checking for designs
- You should Work on Timing analysis for sign-off corners and modes, report generation, analysis of the reports and suggesting timing/DRC fixes to fix the violations
- You must Complete internship project as per plan
Education Required:
Any Graduation
Any stream
Stdents
graduates
skills
- Any skills related to the role
- the selected Should have excellent English communication with a decent accent
- You should have Knowledge of ASIC design flow and tools
- Yuo will have Good understanding of Circuit design and Logic design
- You need to understand the analog circuit design and concepts
- You Good understanding of timing concepts like setup time, hold time requirements, calculations of maximum
- Understanding Frequency of circuit operations, effect of transition and load on circuit performance and power
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